The present invention relates generally to a liquid crystal display device, and more particularly to a liquid crystal display device which has uniform feedthrough voltage components, a high image luminance, and high image display quality.
An active matrix type liquid crystal display panel is a liquid crystal display panel in which a TFT (Thin Film Transistor) is added to each of pixel electrodes disposed in a matrix on a surface of a substrate. Recently, the active matrix type liquid crystal display panel is widely used in a display apparatus for a portable type personal computer or for a desktop type personal computer, in a projection type display apparatus, in a liquid crystal display television and the like. This is because, in the active matrix type liquid crystal display panel, a polarity inversion drive system and the like are recently adopted and thereby display quality such as an image contrast, a response speed to a moving picture signal and the like is improved. However, recently, the panel size of the liquid crystal display device becomes large, each pixel becomes minute and an aperture ratio of each pixel becomes high. For these reasons, a length of each gate wiring conductor becomes long and a width of each gate wiring conductor becomes small, so that an electrical resistance of each gate wiring conductor inevitably increases.
Also, according to an increase in the length of and a decrease in the width of each of the gate wiring conductors, a waveform of a gate pulse applied to the liquid crystal display panel is blunted, because the pixel electrodes driven by the gate pulse have capacitance as well as because the gate wiring conductor has large gate wiring resistance. Further, as a distance from an input end of the gate pulse becomes long, the resistance of the gate wiring conductor becomes large, so that degree of bluntness of the pulse waveform also becomes large as the distance from the input end of the gate pulse becomes long.
For example, in a liquid crystal display panel 1 schematically shown in FIG. 12, signal input portions 2 and 3 are disposed along a left side portion and a lower or bottom side portion of the panel 1. Assuming that the signal input portion 2 is a gate signal input portion from which gate signals are supplied to TFT""s in pixels disposed in a matrix, distances from the gate signal input portion 2 to the TFT""s become larger in order of points (a), (b), (c), or in order of points (A), (B), (C) shown in the drawing. Therefore, gate wiring resistance becomes larger in the same order.
As a result, depending on difference of bluntness of the gate signals, i.e., gate pulses, magnitude of a shift of a potential of a pixel electrode caused when the gate pulse is turned off, that is, magnitude of a feedthrough voltage varies.
As shown by signal waveforms in FIGS. 5A through 5D, the feedthrough voltage becomes a voltage difference, i.e., VFDIN or VFDOUT, between the center potential of drain pulses, i.e., DPC, and the center potential of source pulses, i.e., SPC. Here, it is assumed that VFDIN designates a feedthrough voltage at an input end of the gate pulse and VFDOUT designates a feedthrough voltage at an end opposite to the input end of the gate pulse. In such case, since the feedthrough voltage becomes smaller as the distance from the input end of the gate pulse becomes larger, there is a relationship VFDIN greater than VFDOUT.
When the difference of the feedthrough voltages within an image display area becomes large, there occur image persistence, stain and the like and thereby display quality is deteriorated. Conventionally, in order to minimize the difference of the feedthrough voltages within the image display area, a voltage of an opposing electrode is lowered taking a voltage drop of an offset of a drain signal caused by the feedthrough at the center of the image display area into consideration. However, although an optimum condition is obtained at the center of the image display area, an optimum condition is not obtained at the peripheral portions of the image display area. Therefore, at the peripheral portions, since a DC voltage component is applied to liquid crystal, the above-mentioned image persistence, stain and the like may occur and quality of image display is deteriorated. That is, even if the voltage of the opposing electrode is adjusted to obtain an optimum condition at the center of the image display area, a DC voltage is applied to the liquid crystal at the peripheral portions and it is difficult to effectively avoid deterioration of the image display quality mentioned above.
Here, the reason why the feedthrough voltage varies depending on the blunting of the gate pulse waveform will be described.
FIG. 4 illustrates an equivalent circuit of a portion of a liquid crystal display panel. As shown in FIG. 4, an equivalent circuit of a pixel comprises a TFT 14 whose drain (D) is coupled to a drain signal line 15 and whose gate (G) is coupled to a gate signal line 13, a gate-source capacitance Cgs, a storage capacitance Csc, and a liquid crystal (LC) capacitance Clc. The storage capacitance Csc exists between the source electrode (S) of the TFT 14 and an adjacent gate signal line 13. The LC capacitance Clc exists between the source electrode of the TFT 14, i.e., a display electrode, and an opposing electrode 21.
By using the gate-source capacitance Cgs, the storage capacitance Csc, the liquid crystal (LC) capacitance Clc, and a gate pulse amplitude xcex94Vg, a feedthrough voltage Vfd is represented approximately as follows.
Vfd=[Cgs/(Clc+Csc+Cgs)]*xcex94Vgxe2x80x83xe2x80x83(1)
On the other hand, when a falling edge of the gate pulse is blunted due to a resistance of a gate wiring conductor, a current flows from the source electrode to the drain signal line until the TFT 14 is completely turned off. A total amount of such current, i.e., a TFT leakage, becomes as follows.
∫Ids dt
Taking the total amount of such current into consideration, the feedthrough voltage Vfd becomes as follows.
Vfd=(Cgs*xcex94Vgxe2x88x92∫Ids dt)/(Clc+Csc+Cgs)xe2x80x83xe2x80x83(2)
Here, the total amount of the current, i.e.,
∫Ids dt
is approximately proportional to the degree of bluntness of the gate pulse, and therefore becomes as follows at the side of the gate signal input portion 2.
∫Ids dt≈0
Therefore, the feedthrough voltage components differ between the side of the gate signal input portion 2 and the side opposite thereto, and a feedthrough voltage difference xcex94Vfd in an image display area is produced which is a difference between the values of the formulas (1) and (2) and is represented as follows.
xcex94Vfd=∫Ids dt/(Clc+Csc+Cgs)xe2x80x83xe2x80x83(3)
In order to uniformalize the feedthrough voltage component within an image display area, it is possible to lower gate wiring resistance to reduce quantity of bluntness of the gate pulse. To realize this, it is possible to enlarge a width or a film thickness of the gate wiring conductor, and to change wiring material into those having lower specific resistance, for example, aluminum, gold and the like. However, when enlarging the film thickness of the wiring conductor and when changing the wiring material, it is necessary to change a manufacturing process of the liquid crystal display device. Also, when the width of the wiring conductor is enlarged, an aperture ratio of the liquid crystal display device is deteriorated.
In order to solve such problem, for example, Japanese patent laid-open publication No. 10-39328 discloses a liquid crystal display device in which feedthrough voltage components are uniformalized within an image display area, and variation of DC voltage components applied to the liquid crystal in the image display area is suppressed. Thereby, image persistence, stain and the like of a liquid crystal display panel are improved to obtain a high image display quality.
In the liquid crystal display device of the Japanese laid-open publication No. 10-39328, an auxiliary capacitor portion is added to each of a plurality of pixel electrodes formed on a TFT substrate. Also, the capacitance of the auxiliary capacitor portion becomes smaller as the distance from the input end of the gate signal line coupled with gate terminals of TFT""s becomes farther.
For example, capacitance of the auxiliary capacitor portion additionally provided to each of the pixel electrodes is determined by an overlapped area of the pixel electrode with the gate signal line via an interlayer insulating film. The overlapped area becomes smaller as the distance from the input end of the gate signal line becomes larger.
FIG. 12 also corresponds to a plan view of a liquid crystal display panel disclosed in Japanese patent laid-open publication No. 10-39328. In this liquid crystal display panel, there are provided signal input portions 2 and 3 along the left side portion and the bottom side portion of the panel. It is assumed that gate pulses are inputted from the signal input portion 2, that is, the gate signal input portion 2, to a pixel area 1a. Also, FIGS. 13A, 13B and 13C are partial enlarged views showing pixel portions A, B and C in FIG. 12, respectively. FIGS. 14A, 14B and 14C are enlarged cross sectional views along the line Axe2x80x94Axe2x80x2 of FIG. 13A, the line Bxe2x80x94Bxe2x80x2 of FIG. 13B and the line Cxe2x80x94Cxe2x80x2 of FIG. 13C, respectively.
As shown in FIGS. 13A through 13C and FIGS. 14A through 14C, on a glass substrate 19, gate signal lines 13 each having a predetermined pattern including gate electrode portions for TFT""s 14, an interlayer insulating film 23, and source/drain regions made of amorphous silicon and the like are sequentially formed, and thereby TFT""s 14 are fabricated. Then, drain signal lines 15 are formed such that the drain signal lines 15 are coupled to the drain regions, and pixel electrodes 16 are formed on the interlayer insulating film 23 and coupled to the respective source regions of the TFT""s 14. Each of the pixel electrodes 16 is patterned such that the pixel electrode 16 partially overlaps with the gate signal line 13 coupled to the TFT 14 of the adjacent pixel. The pixel electrodes 16 are covered by a protective film 27. Also, on a glass substrate 20 disposed opposite to the glass substrate 19, there is formed an opposing electrode 21, and a gap portion between the opposing electrode 21 and the protective film 27 on the pixel electrodes 16 and the like is filled with liquid crystal 22.
An equivalent circuit of the liquid crystal display device structure mentioned above can also be represented by the circuit shown in FIG. 4. That is, an equivalent circuit of a pixel comprises a TFT 14 whose drain is coupled to a drain signal line 15 and whose gate is coupled to a gate signal line 13, a gate-source capacitance Cgs, a storage capacitance Csc, and a liquid crystal (LC) capacitance Clc. In this case, the storage capacitance Csc is composed by capacitively coupling the gate signal line 13 and the pixel electrode 16 via the interlayer insulating film 23. Also, the overlapped areas between the gate signal line 13 and the pixel electrodes 16 become smaller as the distance from the gate signal input portion 2 becomes larger, that is, from a portion A toward a portion C. As a result thereof, the storage capacitance Csc becomes smaller from the portion A toward the portion C.
In this structure, as the distance from the gate signal input portion 2 becomes larger, the feedthrough voltage component becomes smaller due to the TFT leakage caused by the blunting of the gate pulse. However, since the storage capacitance Csc becomes smaller as the distance from the gate signal input portion 2 becomes larger, the variation of the feedthrough voltage component is compensated by the variation of the storage capacitance Csc. That is, assuming that the feedthrough voltage component and the storage capacitance at the portion A of FIG. 12 are Vfdin and Csc, respectively, and that the feedthrough voltage component and the storage capacitance at the portion C of FIG. 12 are Vfdout and Cscxe2x80x2, respectively, the feedthrough voltage components Vfdin and Vfdout are respectively represented by the following formulas (4) and (5).
Vfdin=[Cgs/(Clc+Csc+Cgs)]*xcex94Vgxe2x80x83xe2x80x83(4)
Vfdout=(Cgs*xcex94Vgxe2x88x92∫Ids dt)/(Clc+Cscxe2x80x2+Cgs)xe2x80x83xe2x80x83(5)
In these formulas (4) and (5), if the storage capacitance Csc and Cscxe2x80x2 are the same, Vfdin greater than Vfdout. Therefore, by determining the values of Csc and Cscxe2x80x2 such that the values Vfdin and Vfdout become equal to each other, it is possible to uniformalize the feedthrough voltage components both at the portion A and the portion C.
The reason why the feedthrough voltage components can be uniformalized by this method will be described with reference to signal waveform diagrams.
FIGS. 5A and 5B show signal waveforms at the portion A mentioned above, and FIGS. 5C and 5D show signal waveforms at the portion C. Waveforms shown in each of FIG. 5A and FIG. 5C are signal waveforms of gate pulses GP and drain pulses DP inputted respectively to gate signal lines and drain signal lines, and a waveform shown in each of FIG. 5B and FIG. 5D is a waveform of a source pulse SP actually written into a pixel electrode. At the portion A, the source pulse SP is influenced by the falling down of the gate pulse GP, and the potential of the source pulse center SPC becomes lower than the drain pulse center DPC by the amount Vfdin. On the other hand, at the portion C, because of the TFT leakage mentioned above, the influence by the falling down of the gate pulse GP becomes small. Therefore, as mentioned before, by making the storage capacitance on the side opposite to the input side of the gate pulse GP smaller than the storage capacitance on the input side of the gate pulse GP taking the amount of the TFT leakage into consideration, it is possible to reduce the influence by the falling down of the gate pulse GP and to equalize the values of Vfdin and Vfdout with each other.
In practice, it is necessary to previously perform simulation and/or experiment and to evaluate the value of
xe2x80x83∫Ids dt.
Then, required variation of storage capacitance is obtained and the storage capacitance is gradually decreased as the distance from the side of the gate pulse input portion 2 becomes large. Here, the relationship between the storage capacitance values Csc and Cscxe2x80x2 is shown below.
Cscxe2x80x2=[(Cgs*xcex94Vgxe2x88x92∫Ids dt)(Clc+Csc+Cgs)]/(Cgs*xcex94Vg)xe2x88x92(Clsxe2x88x92Cgs)xe2x80x83xe2x80x83(6)
By this formula, the storage capacitance Cscxe2x80x2 at the portion C is obtained, and the storage capacitance is gradually decreased from Csc to Cscxe2x80x2 as the location changes from the gate signal input portion 2 to the opposite side of the gate signal input portion 2. In practice, as shown in FIGS. 13A through 13C, an overlapped area 17a, that is, an overlapped distance, between the pixel electrode 16 and the gate signal line 13 of the former stage is gradually reduced to gradually decrease the storage capacitance, as the location changes from the gate signal input portion 2 to the opposite end.
FIG. 15 shows a result of actual measurement of the feedthrough voltage components in an image display area, which is shown in Japanese patent laid-open publication No. 10-39328. In a conventional liquid crystal display panel which does not use the above-mentioned structure, the value of the feedthrough voltage component becomes smaller as the distance from the gate pulse input portion becomes larger. However, in a liquid crystal display panel which uses the above-mentioned structure, the value of the feedthrough voltage component is substantially uniform at all locations including the portion A and the portion C, regardless of the distance form the gate signal input portion. Therefore, in the liquid crystal display panel having the above-mentioned structure, the feedthrough voltage components within the image display area are uniformalized, and it is possible to suppress occurrence of image persistence, stain and the like within the whole image display area of the liquid crystal display panel to improve quality of image display. However, there exists a constant desire to further improve a quality of displayed image in a liquid crystal display device.
Therefore, it is an object of the present invention to provide a liquid crystal display device in which feedthrough voltage components within an image display area can be uniformalized and in which luminance of displayed image can be further increased.
It is another object of the present invention to provide a liquid crystal display device which has a structure different from the above-mentioned conventional structure but in which feedthrough voltage components within an image display area can be uniformalized to improve image display quality.
It is another object of the present invention to provide a liquid crystal display device in which feedthrough voltage components within an image display area can be uniformalized and image persistence, stain and the like within whole image display area can be suppressed to improve image display quality.
It is still another object of the present invention to provide a liquid crystal display device in which feedthrough voltage components within an image display area can be uniformalized and in which luminance of displayed image can be increased and uniformalized to improve image display quality.
It is still another object of the present invention to provide a liquid crystal display device in which feedthrough voltage components within an image display area can be uniformalized and image persistence, stain and the like within whole image display area can be suppressed, and in which luminance of displayed image can be increased and uniformalized, thereby image display quality can be improved.
According to an aspect of the present invention, there is provided a liquid crystal display device having a liquid crystal display panel, the liquid crystal display panel comprising: a plurality of pixels which are disposed in a matrix having rows and columns and each of which has at least a thin film transistor (TFT) and a pixel electrode; a plurality of gate signal lines which extend from a gate signal input portion disposed along a side of the liquid crystal display panel and each of which is coupled with the TFT""s in a row of the matrix; and auxiliary capacitor portions each additionally coupled with a pixel electrode of one of the pixel, the width of the gate signal line becoming narrower and thereby capacitance of the auxiliary capacitor portions becoming smaller as the distance from the gate signal input portion becomes larger.
In this case, it is preferable that the liquid crystal display device further comprises a backlight portion for illuminating the liquid crystal display panel from the backside thereof, luminance of backlight by the backlight portion becomes lower as the distance from the gate signal input portion becomes larger.
It is also preferable that an area of an aperture portion of the pixel becomes larger as the distance from the gate signal input portion becomes larger.
It is further preferable that capacitance of each of the auxiliary capacitor portions is determined by an area of an opposing portion between a pixel electrode of a pixel and a gate signal line coupled with an adjacent pixel via an interlayer insulating film and a nitride film between the pixel electrode and the gate signal line.
It is advantageous that capacitance of each of the auxiliary capacitor portions is determined by an area of an opposing portion between a pixel electrode of a pixel and a gate signal line coupled with an adjacent pixel via an interlayer insulating film between the pixel electrode and the gate signal line.
It is also advantageous that the backlight portion comprises at least one elongated backlight source and a light guide plate which is disposed on the backside of the liquid crystal display panel and which propagates light from the backlight source toward the liquid crystal display panel, the light guide plate comprising printed light scattering portions disposed on a surface thereof for adjusting a distribution of luminance of backlighting.
It is further advantageous that the backlight portion comprises an elongated backlight source disposed along the side of the liquid crystal display panel where the gate signal input portion is disposed.
It is also preferable that the backlight portion comprises an elongated backlight source disposed along the side of the liquid crystal display panel which is perpendicular to the side where the gate signal input portion is disposed.
According another aspect of the present invention, there is provided a liquid crystal display device comprising: (a) a liquid crystal display panel having: a plurality of pixels which are disposed on a TFT substrate in a matrix having rows and columns and each of which has at least a thin film transistor (TFT) and a pixel electrode; a plurality of gate signal lines which extend on the TFT substrate from a gate signal input portion disposed along a side of the liquid crystal display panel and each of which is coupled with the TFT""s in a row of the matrix; auxiliary capacitor portions each additionally coupled with a pixel electrode of one of the pixel, the width of the gate signal line becoming narrower and thereby capacitance of the auxiliary capacitor portions becoming smaller as the distance from the gate signal input portion becomes larger; and an opposing substrate which opposes to the TFT substrate while keeping a small gap therebetween, the small gap being filled with liquid crystal; and (b) a backlight portion for illuminating the liquid crystal display panel from the backside thereof, luminance of backlight by the backlight portion becomes lower as the distance from the gate signal input portion becomes larger.
In this case, it is preferable that capacitance of each of the auxiliary capacitor portions is determined by an area of an opposing portion between a pixel electrode of a pixel and a gate signal line coupled with an adjacent pixel via an interlayer insulating film and a nitride film between the pixel electrode and the gate signal line.
It is also preferable that capacitance of each of the auxiliary capacitor portions is determined by an area of an opposing portion between a pixel electrode of a pixel and a gate signal line coupled with an adjacent pixel via an interlayer insulating film between the pixel electrode and the gate signal line.
It is further preferable that the backlight portion comprises at least one elongated backlight source and a light guide plate which is disposed on the backside of the liquid crystal display panel and which propagates light from the backlight source toward the liquid crystal display panel, the light guide plate comprising printed light scattering portions disposed on a surface thereof for adjusting a distribution of luminance of backlighting.
It is advantageous that the backlight portion comprises an elongated backlight source disposed along the side of the liquid crystal display panel where the gate signal input portion is disposed.
It is also advantageous that the backlight portion comprises an elongated backlight source disposed along the side of the liquid crystal display panel which is perpendicular to the side where the gate signal input portion is disposed.